Tag: Vivado

Just a list of a few new steps required to install and run Vivado, XSDK and Petalinux 2016.2 on Ubuntu 64bit 16.04: In order to run XSDK which can't use default GTK v3 we have to export new environmental variable. …

Xilinx Vivado, XSDK and Petalinux 2016.2 on Ubuntu 16.04 Read More »

Tagged with: , ,

Today Xilinx released an update to its Vivado. New version number is 2015.2 and biggest news to me is that it now supports Ubuntu Linux 14.04 TLS(64-bit). It also have number of bugs fixed, but not much of new features …

Vivado 2015.2 released today. Read More »

Tagged with: , , ,

Just a short recipe on how to compile 'tslib' and use it with Qt5 on Xilinx Petalinux. At the moment I'm using Ubuntu 14.04 64bit as a host machine, MicroZed 7020 as a target, Xilinx Vivado version 2014.2 and Petalinux …

Configure and build Qt5, tslib and evtest for ARM (Xilinx Zynq). Read More »

Tagged with: , , , , , , , , , , , , , , , , ,

I finally figure it out why Analog Devices reference design create/generated in Vivado 2014 by script(obviously updated to use new IP's, otherwise it didn't assemble 'Block Design' at all) didn't work. Reason is changes in Xilinx Concat IP, which used …

HDMI on ZedBoard with Petalinux update. Read More »

Tagged with: , , , , , , , ,

A small, step-by-step tutorial on how to create and package IP. Just as an example, I will create 3-to-8 decoder IP in Xilinx Vivado 2014.1 and connect it to Zynq SPI chip select pins. This is not a Verilog tutorial, …

Howto create and package IP using Xilinx Vivado 2014.1 Read More »

Tagged with: , , , , , , , , ,

Exciting news! Yesterday Xilinx released Vivado 2014.1 - promise about 25% faster runtime and 1.5x overall speedup in compile+simulation! Also they added OpenCL kernels and some Linear algebra library to Vivado HLS! But for me more important changes is that …

New Vivado 2014.1 released. Read More »

Tagged with: , , , ,

This is the small howto describing export of some peripherals on ZedBoard's PMOD connectors. ZedBoard have some, so called, FIXED_IO connections, which is hardwired to DDR memory, QSPI flash memory, Ethernet and etc. It also export Zynq UART1 to J14 …

Howto export Zynq peripherals(I2C, SPI, UART and etc) to PMOD connectors of ZedBoard using Vivado 2013.4 Read More »

Tagged with: , , , , , , , , , , , , ,

One of the many nice features of Xilinx Zynq is ability to run it in Asymmetric MultiProcessing or AMP configuration. Xilinx released version v2013.10 of a UG980(Petalinux Board Bringup) and UG978(Zynq Linux-FreeRTOS AMP) guides for Xilinx ZC702 board. Today I …

ZedBoard Linux-FreeRTOS AMP Board Bringup Guide. Read More »

Tagged with: , , , , , , , , , , , , , , , ,

Just a picture from Xilinx.com describing new design flow for PetaLinux 13.10 with Vivado 13.x. Helped me alot to figure out changes from previous PetaLinux releases. Like Dislike

Tagged with: , , , , , , ,

I will follow Xilinx UG976, UG977 and UG978 user guides v2013.10 revision. 1. Install fresh Ubuntu 13.10 (64 bit edition) in VMWare Workstation10 virtual machine with atleast 80G disk space and 4G of RAM. 2. Go to Xilinx.com and DigilentInc.com …

Installing Vivado 13.4 and PetaLinux SDK on Ubuntu 13.10 amd64(64 bit) for ZedBoard. Read More »

Tagged with: , , , , , , , , , , , ,
×